A lateral diffusion metal-oxide-semiconductor field effect transistor (LDMOSFET) is a field effect transistor having a drift region between a gate and a drain region in order to avoid a high electric field at a drain junction, i.e., at the p-n junction between a body and the drain region. An LDMOSFET is typically employed in high voltage power applications involving voltages in the range from about 5 V to about 50 V, which is applied across the drain region and the source region. A substantial fraction of the high voltage may be consumed within the drift region in the LDMOSFET so that the electric field generated across the gate dielectric does not cause breakdown of the gate dielectric.
A thin gate dielectric is preferred on the source side of a gate electrode to apply a strong electric field to induce current flow, while a thick gate dielectric is preferred on the drain side of the gate electrode to prevent an excessive electric field across the gate oxide in the LDMOSFET. Methods of employing a thicker oxide on the drain side relative to the source side have been known in the art.
Referring to FIG. 1, a first exemplary prior art LDMOSFET structure is shown, which comprises a substrate semiconductor region 110 containing a semiconductor material and having a doping of a first conductivity type and located in a semiconductor substrate 108. Typically, the dopant concentration of the substrate semiconductor region is low, i.e., from about 3.0×1014/cm3 to about 1.0×1016/cm3. A first conductivity type well 130 located in the semiconductor substrate 108 comprises the same semiconductor material as the substrate semiconductor region 110. The first conductivity type well 130 has a doping of the first conductivity type and has a dopant concentration higher than the doping concentration of the substrate semiconductor region 130. A LOCOS (local oxidation of silicon) oxide 150 is present on a portion of a top surface of the semiconductor substrate 108. The LOCOS oxide 150 has two bird's beaks and is integrally formed with a thin silicon oxide layer that is adjoined to one of the bird's beaks. A drift region 140 having a doping of a second conductivity type, which is the opposite of the first conductivity type, is located directly beneath a portion of the LOCOS oxide 150, and is disjoined from the first conductivity type well 130. The drift region 140 comprises the same semiconductor material as the substrate semiconductor region 110. A source region 142 and a drain region 144, each comprising a semiconductor material and having a doping of the second conductivity type, are located within the first conductivity type well 130 and the drift region 140, respectively. A substrate contact semiconductor region 132 comprising the semiconductor material and having a doping of the first conductivity type is also formed in the first conductivity type well 130 at a location farther away from the drift region 140 than the first conductivity type region 130. A source and substrate metal contact 182 is located on the source region 142 and the substrate contact semiconductor region 132. Likewise, a drain metal contact 184 is located on the drain region 184. A gate electrode 160 straddles a portion of the first conductivity type well 130, a portion of the substrate semiconductor region 110, and the drift region 140. A gate spacer 162 and a gate metal contact 186 are located on the gate electrode 160. LOCOS isolation 120 provides electrical isolation between various components on the surface of the semiconductor substrate 108.
Local oxidation of silicon (LOCOS) process employs a silicon substrate having a patterned oxygen-diffusion-resistant layer thereupon. Typically, the oxygen-diffusion-resistant layer is a silicon nitride layer. During a thermal oxidation process, exposed portions of the silicon substrate are thermally oxidized to form thermal silicon oxide. As oxygen atoms diffuse underneath the edge of the oxygen-diffusion-resistant layer, a tapered silicon oxide structure having a concave curvature known as a bird's beak is formed underneath the oxygen-diffusion-resistant layer. Formation of the bird's beak thus requires presence of the oxygen-diffusion-resistant layer. The LOCOS oxide 150 in the first exemplary prior art semiconductor LDMOSFET structure is formed prior to formation of the gate electrode 160 by forming a patterned oxygen-diffusion-resistant layer, e.g., a silicon nitride layer, and performing a thermal oxidation of silicon.
For the LOCOS process, the gate electrode 160 is formed after the formation of the LOCOS oxide 150. Patterning of the gate electrode 160 is performed on a preexisting LOCOS oxide 150. The location of the bird's beak structure relative to the gate electrode 160 is subject to overlay variations of the alignment of the lithographic pattern of the gate electrode and the lithographic pattern of the oxygen-diffusion-resistant layer. Thus, it is inherent in the first exemplary prior art LDMOSFET structure that the thickness profile of the LOCOS oxide 150, which is a gate oxide, is not self-aligned to an edge of the gate electrode 160, and as a consequence, performance of the first exemplary prior art LDMOSFET has significant variations in terms of response of drain current as a function of a gate voltage.
Referring to FIG. 2, a second exemplary prior art LDMOSFET structure known as reduced surface field metal oxide semiconductor field effect transistor (RESURF MOSFET) is shown. The first conductivity type well 130 and the drift region 140 laterally abut each other so that the electric field across a thinner portion of the LOCOS oxide 150 is reduced. The position of the LOCOS oxide 150 relative to the gate electrode 160 is also subject to lithographic overlay variations as in the first exemplary prior art LDMOSFET.
In view of the above, there exists a need for an LDMOSFET structure providing advantageous effects of different gate dielectric thicknesses across the source side edge and the drain side edge of a gate electrode as well as consistent device performance independent of overlay variations in lithographic steps of a manufacturing sequence, and methods of manufacturing the same.
Further, there exists a need for an LDMOSFET structure having a graded gate dielectric thickness from the source side to the drain side, wherein the thickness profile of the gate dielectric is self-aligned to the gate electrode, and methods of manufacturing the same.
In addition, there exists a need for an LDMOSFET structure having well controlled oxide thickness profile having a monotonically increasing gate dielectric thickness from the source side to the drain side, and methods of manufacturing the same.